Integrated circuits created on semiconductor wafers are ubiquitous in modern electronic devices. These circuits may be implemented in a wide variety of semiconductor technologies including, for example, metal-oxide-semiconductor (MOS), complementary MOS (CMOS), bipolar CMOS (BiCMOS) or bipolar junction transistors (BJT). Further, although silicon is by far the most widely used semiconductor substrate, electronic circuits are also made with other semiconductors such as silicon—germanium (SiGe) and gallium arsenide (GaAs).
Over the past twenty years new techniques for making mechanical devices on silicon, semiconductor, and insulating wafer substrates have also been developed. These devices are often termed “micro-electromechanical systems” or MEMS. Examples of MEMS include accelerometers used to trigger automobile air bag deployment and light modulator chips in some types of visual displays.
Integrated circuits (IC's) may be used to create, send, receive, and interpret instructions or data, to and from MEMS devices. IC and MEMS chips can be interconnected with one another by circuit boards or by more advanced techniques such as flip-chip bonding. However, the most efficient, compact and highest performance connection between IC's and MEMS occurs when the two technologies are created or integrated monolithically; i.e. on the same wafer.
Several combined IC and MEMS silicon fabrication processes exist. For example, processes developed by Texas Instruments, Analog Devices and Sandia National Laboratory represent a few approaches to IC/MEMS integration.
These and other IC/MEMS processes vary in the order of their process steps, the structural material used for MEMS components, and the sacrificial material removed to release MEMS structures, among other aspects. One consideration that affects the order of processing steps is the ability of a partially completed IC/MEMS device to withstand high temperatures. Both mechanical and electronic devices on a partially completed wafer may be adversely affected by high process temperatures in later processing steps.
Texas Instruments' Digital Light Processor MEMS process uses metal as a structural material and organic polymer as a sacrificial material. A thick oxide is deposited over Metal-2 of a CMOS process and then planarized using a chemical mechanical polish (CMP) technique. The CMP step provides a flat substrate for Digital Mirror Device superstructure fabrication. This is an example of a stacked process; in other words, one in which electronic and mechanical components are stacked vertically on a wafer.
Analog Devices' integrated MEMS (iMEMS) process begins with CMOS processing through the creation of polysilicon gates. An area is left empty in the center of each die for a MEMS sensor. Sensors are created in successive steps: a sacrificial oxide and a polysilicon structural layer are deposited, and then sensor elements are patterned. Next, aluminum interconnects are formed and the circuit is passivated. Finally the sensor elements are released while the circuit remains protected.
Sandia National Laboratory's Ultra-planar, Multi-level MEMS Technology 5 (SUMMiT V™) Fabrication Process is a five-layer polycrystalline silicon surface micromachining process comprising one ground plane or electrical interconnect layer and four mechanical layers. The SUMMiT process uses polysilicon as a structural material and silicon dioxide as a sacrificial material. MEMS process steps are performed first, followed by chemical mechanical planarization and CMOS.
Each class of structural or sacrificial materials used in the MEMS part of a monolithic IC/MEMS process presents a challenge to the process design engineer. Therefore the art of monolithic IC/MEMS processing is fertile ground for innovation.